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HD$((fLHpHHH5HLd01pLLHWIpHL$HH HWLIHHHPHHL$pLHt@tHHL$HrHgXQIxHL$HG_1H sPHLHt BHHHgHL$}PI8HL$ 01H5*ff.fAWAVAUATUSH8dH%(HD$(1BӉAHӉI0AD$9t$E11ۅgQfH=y12~H=&1"~DL藰H=PHHD=1E9\$@EO4Av@D$ t ~1HT$$Mu-BD$$7H=syVV&HD$(dH+%(tH8H=#1[]A\A]A^A_xD1H=TyHƀ VH=#1UAAAPBDLE1DL$ țt$ LG=>DA0A&AFAA <wH Y@F APDDLE1DT$DL$ )T$t$ LdAAAFADAP BAAuoAtiAVAЀ DJAAA)AFA<z<V<W<bEKAAuAtAFA< )H VHcH>ADEtAFAA<H H|%iA_IFH>HGH3AvHDDT$DL$D\$sD\$DL$D$ DT$APv AFQ1DDELD\$DT$DL$-T$t$LD\$1fDT$ DLED\$T$ t$Ly4AH;A}IFHHHAAAA[ADZEEAFAA </H H% AIFH>CHH3AvHDDT$DL$D\$SrD\$DL$D$ DT$AAAEAAAAAAE1D$ AAFQAIDDELD\$H&DT$DL$L$VT$t$LD\$L$A#~fD<+DJADHEH.AvHDD\$D\$ qDL$D\$ AIF3'H.AvHDD\$D\$ pDL$D\$ AIFff.GtDFHN?DPH SH5H='fAU1AATIUHSH@%xgD1%xO _HcHD,fLH@H HL Hh1H[]A\A]1H=sq1H=`OfDAT11UH?dH%(HD$1)xvHL$AljźD$%(&IHHH5#x@HD$dH+%(usH]A\HD$dH+%(u[HH=]r1]A\p@@H5@%Lh#%H=9r1E1Wp$;Tff.ATUHdH%(H$1t11H|~"x3I11rL"xL<)1L1"H$dH+%(u HĘ]A\=$ff.fAWAVAUATIUHSHHH5H8dH%(HD$(1Lt$L"`Ht$HFH,LT$L|$HILL$&M1LHL$$H5JLL$L$D$$D$&%L$LL$t6D$$D$&1MLLH5L%pD|$EbDl$ETF(HHD$$kt!/t#g+EiEiEiDl$HD$&C%s%s%llu%%s: %s Transaction: %s triggeredserver.ccc->inbuf == NULLpermission denied cc->outbuf == NULLdumpbiosallUnknown dump parameter done Memory errors SOCKET %u CHANNEL any CHANNEL %d DIMM any DIMM %dDMI_NAME "%s"DMI_LOCATION "%s"uncorrected memory errorspagesnot enabledpingpong Unknown command eventloop.ci >= 0 && i < max_pollfd%#llxOfflining page %llx ping Cannot chdir(%s) for trigger?/sbin:/usr/sbin:/bin:/usr/bin%ld%s: %sLocation %s PATHPATH=%sTHRESHOLD=%sTOTALCOUNT=%luDMI_LOCATION=%sDMI_NAME=%sDIMM=%dCHANNEL=%dSOCKETID=%dCECOUNT=%luUCCOUNT=%luLASTEVENT=%luAGETIME=%uMESSAGE=%sTHRESHOLD_COUNT=%dUnsockdb_fallbacksockdb_memdbCPU %d on socket %d%s received unknown errorCPU %dCPU=%dMISC=%llxADDR=%llxMCGSTATUS=%llxMCGCAP=%llxCannot collect child %dclient socketclient connectclient command writeclient readCannot read sysfs field %s/%sLEVEL=%dTYPE=%s/sys/devices/system/cpucpu%u%s/%s/cachecache.ccpu < cachelen%s/index%dlevelshared_cpu_maplen == c * sizeof(unsigned)No caches found in sysfsAFFECTED_CPUS=%s%uAFFECTED_CPUS=unknownyellowTHERMAL EVENTACPI/APEI reported errorUNKNOWNUnknown vendorUndecoded extended event %xBANK %dCPU %d %s nonstop_tscconstant_tsc C%d:usageusage[%d]/sys/devicesTSC %llx %sRIP%s %02x:%llx MISC %llx ADDR %llx TIME %llu %sMCG status:RIPV EIPV MCIP LMCE MCi status: Machine check not valid Error overflow Uncorrected error Corrected error by %s Corrected error Error enabled MCi_MISC register valid MCi_ADDR register valid Processor context corrupt MCA: %s TLB %s Error %s CACHE %s %s Error Memory as cache: Internal Timer error LEVEL=%sPARTICIPATION=%sREQUEST=%sORIGIN=%sTIMEOUT=%sbusSEG=%xBUS=%02xDEVICE=%02xFUNCTION=%xiomcaUnknown Error %x Model:MISC format %llx value %llx PCU: QPI MemCtrl: Intel TXT errors Other UBOX Internal errors PCU internal error QPI: Ubox error UPI: M2M: MscodDDRType=0x%llx MscodMiscErrs=0x%llx failed device: 0x%x rank: 0x%x subrank: 0x%x ecc mode: SDDC memory mode SDDC ADDDC memory mode ADDDC DDRT read unknown transient HBM: HBM Error failed device: 0x%x,0x%x HBM 64B read HBM 32B read SDDC 2LM memory mode SDDC+1 2LM memory mode SDDC+1 ADDDC 2LM memory mode ADDDC+1 2LM memory mode ADDDC+1 Punit: B2CMI: MCCHAN: SDDC 128b 1LM SDDC 125b 1LM SDDC 96b 1LM SDDC 96b 2LM ADDDC 80b 1LM ADDDC 80b 2LM ADDDC 64b 1LM 9x4 61b 1LM 9x4 32b 1LM 9x4 32b 2LM Invalid/unknown ECC mode STATUS %llx MCGSTATUS %llx MCGCAP %llx APICID %x SOCKETID %x PPIN %llx MICROCODE %x <%u>%hu Mhz NoneDevice Locator: %s Bank Locator: %s Manufacturer: %s Serial Number: %s Asset Tag: %s Part Number: %s RIP: %s (Fields were incomplete) CPU CPU %u BANK %u%nCPU %u %u%nMCGSTATUSMCGSTATUS %llx%nRIP !INEXACT!%02x:<%016Lx> {%99s}%nTSC %llx%nADDRADDR %llx%nMISCMISC %llx%nPROCESSORPROCESSOR %u:%x%nTIMETIME %llu%n%10s %10s %u %u:%u:%u %u%nMCGCAPMCGCAP %llx%nAPICIDAPICID %x%nSOCKETIDSOCKETID %u%nCPUIDHARDWARE ERROR(XEN)(XEN) Bank %d: %llx at %llxmce: [Hardware Error]:page-error-counterpage%lldpage_pre_softpage_post_softno data in mce record mcelog readMCE %d consider an update mcelog.c(pfd->revents & POLLIN) != 0poll table overflowmcelog server too busy %s-threshold%u %1s / %u %1s%u / %u %1s%s-triggerTrigger `%s' not executable %s-log--confHeader without ending ]Cannot open config file %s dump all bios pages mcelog %s CPU is unsupported Cannot open logfile %schildren-maxdirectorycache-threshold-triggercache-threshold-logbus-uc-threshold-triggeriomca-threshold-triggerunknown-threshold-triggerrun-credentialsfilter-memory-errorsCannot open `%s'MCE_GET_RECORD_LENMCE_GET_LOG_LENdimm-tracking-enableddimmsocket-tracking-enabledmem-ce-errormem-uc-errordmi-prepopulateNODE %u CHANNEL %u DIMM %uNode%u_Bank%uA%u_BANK%uinitial-ping-timeoutlisten-backlogcannot open listening socketmemory-cememory-ce-counter-replacementmemory-ce-actionlockdown/sys/kernel/security[none]/dev/cpu/%d/msrCannot change group to %dCannot change user to %ddaemonCannot open pidfile `%s'poll error__Node%u_Channel%u_Dimm%uBERR on this CPUFRC errorPIC or FSB data parity errorBINIT observedMCE is observedMCE drivenuncorrectable ECC errorfailure that caused IERRinternal BINITBQ_ERR_HARD_TYPEBQ_ERR_DOUBLE_TYPEBQ_ERR_AERR2_TYPEBQ_ERR_SINGLE_TYPEBQ_ERR_AERR1_TYPEBQ_DCU_READ_TYPEBQ_IFU_DEMAND_TYPEBQ_IFU_DEMAND_NC_TYPEBQ_DCU_RFO_TYPEBQ_DCU_RFO_LOCK_TYPEBQ_DCU_ITOM_TYPEBQ_DCU_WB_TYPEBC_DCU_WCEVICT_TYPEBQ_DCU_WCLINE_TYPEBQ_DCU_BTM_TYPEBQ_DCU_INTACK_TYPEBQ_DCU_INVALL2_TYPEBQ_DCU_FLUSHL2_TYPEBQ_DCU_PART_RD_TYPEBQ_DCU_PART_WR_TYPEBQ_DCU_SPEC_CYC_TYPEBQ_DCU_IO_RD_TYPEBQ_DCU_IO_WR_TYPEBQ_DCU_LOCK_RD_TYPEBQ_DCU_LOCK_WR_TYPEBQ_DCU_SPLOCK_RD_TYPEMemory address parity errorMemory internal RTID invalidMemory access out of rangeMemory reserved 20Memory write parity errorMemory read ECC errorQPI misc reserved 15QPI misc reserved 14QPI reserved 21QPI reserved 20QPI header had bad parityInternal timeout errorInclusion error from core 0Inclusion error from core 1Inclusion error from FSBSNP stall error from FSBWrite stall error from FSBFSB Arbiter Timeout errorInclusion error from core 2No ErrorReceived an invalid CMPDInvalid S-state transitionMC_IMC_FORCE_SR_S3_TIMEOUTMC_MC_CPD_UNCPD_ST_TIMEOUTMC_PKGS_SAFE_WP_TIMEOUTMC_MORE_THAN_ONE_LT_AGENTMC_INVALID_PKGS_REQ_PCHMC_INVALID_PKGS_REQ_QPIMC_INVALID_PKGS_RES_QPIMC_INVALID_PKGC_RES_PCHMC_INVALID_PKG_STATE_CONFIGMC_WATCHDG_TIMEOUT_PKGC_MAINMC_WATCHDG_TIMEOUT_PKGS_MAINMC_HA_FAILSTS_CHANGE_DETECTEDNo errorNon_IMem_SelI_Parity_ErrorBad_OpCodeI_Stack_UnderflowI_Stack_OverflowD_Stack_UnderflowD_Stack_OverflowNon-DMem_SelD_Parity_ErrorUncorrected spare errorCorrected spare errorCorrected patrol scrub errorAddress parity errorMC_CRITICAL_VR_FAILEDMC_ICC_MAX-NOTSUPPORTEDiMC, WDB, parity errorsCorrected memory read errorMC_MESSAGE_CHANNEL_TIMEOUTMC_CPD_UNCPD_SD_TIMEOUTMC_DMI_TRAINING_TIMEOUTMC_DMI_CPU_RESET_ACK_TIMEOUTMC_SVID_COMMAN_TIMEOUTMC_VR_VOUT_MAC_LT_FUSED_SVIDMC_PKGC_WATCHDOG_HANG_CBZ_UPMC_ICC_MAX_NOTSUPPORTEDMC_VID_RAMP_DOWN_FAILEDMC_EXCL_MODE_NO_PMREQ_CMPMC_BOOT_VID_TIMEOUT_DRAM_0MC_BOOT_VID_TIMEOUT_DRAM_1MC_BOOT_VID_TIMEOUT_DRAM_2MC_BOOT_VID_TIMEOUT_DRAM_3MC_SVID_COMMAND_ERRORMC_FIVR_CATAS_OVERVOL_FAULTMC_FIVR_CATAS_OVERCUR_FAULTMC_SVID_PKGC_REQUEST_FAILEDMC_SVID_IMON_REQUEST_FAILEDMC_SVID_ALERT_REQUEST_FAILEDMC_INVALID_PKGS_RSP_QPIMC_INVALID_PKGS_RSP_PCHMC_IMC_RW_SMBUS_TIMEOUTMC_MSGCH_PMREQ_CMP_TIMEOUTMC_WATCHDOG_TIMEOUT_PKGC_MAINMC_WATCHDOG_TIMEOUT_PKGS_MAINMC_BIOS_RST_CPL_INVALID_SEQMC_MORE_THAN_ONE_TXT_AGENTDDR3 address parity errorRBT used un-initialized valueLink failover clock failoverWDB read parity errorAny HA read errorHA write data parity errorUnrecognized request typeUnexpected read responseCompletion FIFO overflowCorrectable parity errorUncorrectable errorERID FIFO overflowError on Write creditsError on Read creditsScheduler errorError eventMscodBucket1ErrMscodParErrMscodTimeoutMscodBgfErrMscodFullWrErrMscodPtlWrErrReservedMscodDataRdErrLink Layer Tx Parity ErrorRouteback Table errorRF parity errorUnexpected Retry.Req flitUnexpected Retry.Ack flitUC Phy Initialization FailureUC LL or Phy control errorCOR Phy initialization abortCOR Phy resetMCA_DMI_TRAINING_TIMEOUTMCA_DMI_CPU_RESET_ACK_TIMEOUTMCA_MORE_THAN_ONE_LT_AGENTMCA_BIOS_RST_CPL_INVALID_SEQMCA_MESSAGE_CHANNEL_TIMEOUTMCA_MSGCH_PMREQ_CMP_TIMEOUTMCA_PKGC_INVALID_RSP_PCHMCA_PKGC_WATCHDOG_HANG_CBZ_UPMCA_SVID_COMMAND_TIMEOUTMCA_SVID_CRITICAL_VR_FAILEDMCA_SVID_SA_ITD_ERRORMCA_SVID_READ_REG_FAILEDMCA_SVID_WRITE_REG_FAILEDMCA_SVID_PKGC_INIT_FAILEDMCA_SVID_PKGC_CONFIG_FAILEDMCA_SVID_PKGC_REQUEST_FAILEDMCA_SVID_IMON_REQUEST_FAILEDMCA_SVID_ALERT_REQUEST_FAILEDMCA_FIVR_CATAS_OVERVOL_FAULTMCA_FIVR_CATAS_OVERCUR_FAULTMCA_PKGS_CPD_UNCPD_TIMEOUTMCA_PKGS_INVALID_REQ_PCHMCA_PKGS_INVALID_REQ_INTERNALMCA_PKGS_INVALID_RSP_INTERNALCORR_PATSCRUB_MIRR2ND_ERRUC_PATSCRUB_MIRR2ND_ERRCOR_SPARE_MIRR2ND_ERRUC_SPARE_MIRR2ND_ERRHA_RD_MIRR2ND_ERRHA_UNCORR_RD_MIRR2ND_ERRDDR-T bad requestERID FI FO overflowDDR-T scheduler errorDDR-T FNV error eventDDR-T FNV thermal eventCMI packet while idleDDR_T_RPQ_REQ_PARITY_ERRDDR_T_WPQ_REQ_PARITY_ERR2LM_NMFILLWR_CAM_ERRCMI_CREDIT_OVERSUB_ERRCMI_CREDIT_TOTAL_ERRCMI_CREDIT_RSVD_POOL_ERRDDR_T_RD_ERRORWDB_FIFO_ERRCMI_REQ_FIFO_OVERFLOWCMI_REQ_FIFO_UNDERFLOWCMI_RSP_FIFO_OVERFLOWCMI_RSP_FIFO_UNDERFLOWCMI _MISC_MC_CRDT_ERRORSCMI_MISC_MC_ARB_ERRORSDDR_T_WR_CMPL_FI FO_OVERFLOWDDR_T_WR_CMPL_FI FO_UNDERFLOWCMI_RD_CPL_FIFO_OVERFLOWCMI_RD_CPL_FIFO_UNDERFLOWTME_KEY_PAR_ERRTME_CMI_MISC_ERRTME_CMI_OVFL_ERRTME_CMI_UFL_ERRTME_TEM_SECURE_ERRTME_UFILL_PAR_ERRINTERNAL_ERRTME_INTEGRITY_ERRTME_TDX_ERRTME_UFILL_TEM_SECURE_ERRTME_KEY_POISON_ERRTME_SECURITY_ENGINE_ERRRPQ parity (primary) errorHBM data parity errorRPA parity errorDDR_T_DPPP data BE errorDDR_T_DPPP data errorDDR link failurePCLS CAM errorPCLS data errorData parity errorData ECC errorData byte enable parity errorTransaction ID parity errorCorrected read errorUncorrected read errorUncorrected metadatafatal Bucket1 errorM2M tracker parity errorM2M time outFull write data errorMC partial write data errorMC read data errorTx received LLRInvalid OpCode seenStack UnderflowStack OverflowSMBus controller raised SMIMCA_LLC_BIST_ACTIVE_TIMEOUTMCA_INCOMPATIBLE_PCH_TYPEMCA_PCU_PMAX_CALIB_ERRORMCA_TSC100_SYNC_TIMEOUTMCA_GPSB_TIMEOUTMCA_PMSB_TIMEOUTMCA_IOSFSB_PMREQ_CMP_TIMEOUTMCA_SVID_MCP_VR_RAMP_ERRORMCA_FIVR_PD_HARDERRMCA_PKGS_SAFE_WP_TIMEOUTMCA_PKGS_RESET_PREP_TIMEOUTMCA_PKGC_DISP_BUSY_TIMEOUTMCA_PKGC_ALLOW_L1_ERRORMCA_ADR_SIGNAL_TIMEOUTRead ECC errorRdTrkr Parity errorPrefetch channel mismatchRead completion parity errorResponse parity errorCMI total credit count errorUC LL Rx SGX MAC ErrorMCE when CR4.MCE is clearMCE when MCIP bit is setMCE under WPSSW triple fault shutdownWDB Read Parity Error on sCH1MC Internal ErrorsDDR CAParity or WrCRC ErrorWDB Read Parity Error on sCH0DDR Link FailIllegal incoming opcodeAddress Parity Error (APPP)UnCorr Patrol Scrub ErrorUnCorr Spare ErrorRead 2LM MetaData ErrorTracker Parity errorSecurity mismatchSAI mismatch errorS3M signaled errorUC LL or Phy Control ErrorUC LL Rx Parameter ExceptionUC LL TDX FailureUC LL SGX FailureUC LL Tx SDC Parity ErrorUC LL Rx SDC Parity ErrorUC LL FLE FailureUC LL Detected Control ErrorCOR Phy Initialization AbortCOR Phy Inband ResetWDB read ECCUncorrected demand read errorCmd/Addr paritygeneric CPUAMD K8 and derivatesIntel P4Intel Xeon 7100 seriesAlderlakeArrowlakeATOMBroadwellCometlakeIntel CoreDenvertonDiamond RapidsIntel Xeon 7400 seriesEmeraldrapids serverGrandridgeGraniterapidsIntel Xeon v3 (Haswell) EP/EXHaswellIcelake server D FamilyIcelakeIcelake serverIvy BridgeKabylakeKnights LandingKnights MillLakefieldLunarlakeMeteorlakeIntel PPro/P2/P3/old XeonPantherlakeRaptorlakeRocketlakeSandy Bridge EPSandy BridgeSapphirerapids serverSierraforestSkylakeSkylake serverTigerlakeTremont microserverIntel Xeon 7500 seriesInstructionDataUnifiedonlineofflineoffline-failedGeneric undefined requestMemory read errorMemory write errorAddress/Command errorMemory scrubbing errorReserved 5Reserved 6Reserved 7GENRDWRACRES5RES6RES7Unknown threshold counterMC4_MISC0 DRAM thresholdMC4_MISC1 Link thresholdMC4_MISC2 L3 Cache thresholdMC4_MISC3 FBDIMM thresholddata cacheinstruction cachebus unitload/store unitnorthbridgefixed-issue reoderRAM ECC errorCRC errorSync errorMaster abortTarget abortGART errorRMW errorWatchdog errorRAM Chipkill ECC errorDEV ErrorLink Data ErrorLink Protocol ErrorNB Array ErrorDRAM Parity ErrorLink RetryTablew Walk Data ErrorL3 Cache Data ErrorL3 Cache Tag ErrorL3 Cache LRU Errorlocal node originlocal node responselocal node observedgeneric participationrequest didn't time outrequest timed outres.i/ogenericgeneric errorgeneric readgeneric writedata readdata writeinstruction fetchprefetchevictsnoopinstructionreservederr cpu0err cpu1err cpu2err cpu3error found by scrubsublink or DRAM channelL3 subcache in error bit 0L3 subcache in error bit 1res12uncorrected ecc errorres23res24processor context corrupterror address validmisc error validerror enableerror uncorrectedSocketyestruenofalseoffaccountsoft-then-hard/dev/mceloglogfilek8p4core2intel-cpuignorenodevno-filterno-dmidmi-verbosecpumhzsyslog-errordump-raw-asciirawno-syslogversionconfig-fileforegroundnum-errorspidfiledebug-numerrorsno-imc-logmax-corr-err-countershelpis-cpu-supportedMCA:*MCi_MISC register valid*MC? status*Unsupported new Family*greenres3Request-did-not-timeoutRequest-timed-outMemory-accessIOOther-transactionLocal-CPU-originated-requestResponed-to-requestObserved-error-as-third-partyGenericData-ReadData-WriteInstruction-FetchPrefetchEvictionSnoopUnknownLevel-0Level-1Level-2Level-3UnclassifiedMicrocode ROM parity errorExternal errorInternal parity errorUCNASRAOSRARFSB address parityResponse hard failResponse parityPIC and FSB data parityPad state machinePad strobe glitchPad address glitchMemory DIMM ID of errorMemory channel ID of errorMemory ECC syndromeMemory MISC reserved 25..37Memory MISC reserved 53..56QPI Request Transaction IDQPI miscreserved 19-23Corrected eventsOtherFast-pagedStatic ColumnPseudo staticRAMBUSSynchronousCMOSEDOWindow DRAMCache DRAMNon-volatileRegisteredUnbufferedLRDIMMSIMMSIPChipDIPZIPProprietary CardTSOPRow of chipsSODIMMSRIMMEDRAMVRAMSRAMFLASHEEPROMFEPROMCDRAM3DRAMSDRAMSGRAMRDRAMDDR2 FB-DIMMReserved 0x15Reserved 0x16Reserved 0x17FBD2LPDDRLPDDR2LPDDR3LPDDR4CyrixUMCvendor 4Centaurvendor 6TransmetaNSCintelxeon5000xeon7100tulsaxeon71xxalderlakearrowlakeatombroadwellbroadwell-dbroadwell-epbroadwell-exxeon-v4cometlakexeon3100xeon3200xeon5100xeon5200xeon7200denvertondiamond_rapidsdunningtonxeon7400xeon74xxemeraldrapids_servergrandridgegraniterapidshaswell-ephaswell-exxeon-v3haswellicelakeicelake-dicelake_serverivybridge-epivybridge-exxeon-v2ivybridgekabylakeknightslandingknightsmilllakefieldlunarlakemeteorlakecore_i3core_i5core_i7nehalemwestmerexeon5500p6oldpantherlakeraptorlakerocketlakesandybridgesandybridge-epsapphirerapids_serversierraforestskylakecascadelake_serverskylake_servertigerlakesnowridgexeon7500xeon75xx66BBff<<~lxrNNH H``ZZTT0 000`P``````Hx`8rZZZZZZZZrqZZZZdqZZpoZZ8oZZTrZZlnlnZZsZZZZZZZZZZZZtsZZZZZZZZooo8oZZepZZlnppspskkkkkkkokkokkkkkkkkkkkkkkkko,tkkkkkkkkkkkoYtst2ts$tstsXssXXXsoooooosu(u(u(u(uo(u(u(u(u(u(u(u|o^|M|||F|||||||||||||||||||||||5$~n^N>.}}Ї}}}߆}}}}}}}Ά~~~~~~~~~ԇo\ RRRRRwR6RRRRRRRRRfRRRRRCw6RR Ԫs KY::::wog_Eparse_cpumapread_cachesclient_inputprocess_cmdunregister_pollcb/etc/mcelog/mcelog.confprocess_mcefdUsage: mcelog [options] [mcelogdevice] Decode machine check error records from current kernel. mcelog [options] --daemon Run mcelog in daemon mode, waiting for errors from the kernel. mcelog [options] --client Query a currently running mcelog daemon for errors mcelog [options] --ascii < log mcelog [options] --ascii --file log Decode machine check ASCII output from kernel logs Options: --version Show the version of mcelog and exit --cpu CPU Set CPU type CPU to decode (see below for valid types) --intel-cpu FAMILY,MODEL Set CPU type for an Intel CPU based on family and model from cpuid --k8 Set the CPU to be an AMD K8 --p4 Set the CPU to be an Intel Pentium4 --core2 Set the CPU to be an Intel Core2 --generic Set the CPU to a generic version --cpumhz MHZ Set CPU Mhz to decode time (output unreliable, not needed on new kernels) --raw (with --ascii) Dump in raw ASCII format for machine processing --daemon Run in background waiting for events (needs newer kernel) --client Query a currently running mcelog daemon for errors --ping Send ping command to the currently running mcelog daemon --ignorenodev Exit silently when the device cannot be opened --file filename With --ascii read machine check log from filename instead of stdin --logfile filename Log decoded machine checks in file filename --syslog Log decoded machine checks in syslog (default stdout or syslog for daemon) --syslog-error Log decoded machine checks in syslog with error level --no-syslog Never log anything to syslog --logfile filename Append log output to logfile instead of stdout --dmi Use SMBIOS information to decode DIMMs (needs root) --no-dmi Don't use SMBIOS information --dmi-verbose Dump SMBIOS information (for debugging) --filter Inhibit known bogus events (default on) --no-filter Don't inhibit known broken events --config-file filename Read config information from config file instead of /etc/mcelog/mcelog.conf --foreground Keep in foreground (for debugging) --num-errors N Only process N errors (for testing) --pidfile file Write pid of daemon into file --no-imc-log Disable extended iMC logging --is-cpu-supported Exit with return code indicating whether the CPU is supported --max-corr-err-counters Max page correctable error counters --help Display this message. handle %x length %d truncated Family 6 Model %u CPU: only decoding architectural errors Family %u Model %u CPU: only decoding architectural errors Unknown Intel CPU type family %u model %u ERROR: AMD Processor family %d: mcelog does not support this processor. Please use the edac_mce_amd module instead. ERROR: Hygon Processor family %d: mcelog does not support this processor. Please use the edac_mce_amd module instead. warning: Cannot parse /proc/cpuinfo warning: Cannot open /proc/cpuinfo range %x-%x h %x a %x row %u ilpos %u ildepth %u dimm h %x width %u datawidth %u size %u set %u /sys/firmware/dmi/entries/%hhu-%d/raw/sys/firmware/dmi/entries/0-0/rawCannot open /dev/mem for DMI decoding: %sNo valid SMBIOS entry point: Continue without DMI decoding%s: SMBIOS entry point at 0x%08lx Cannot mmap 0x%lx for efi mode: %sCannot mmap 0xf0000 for legacy mode: %sDMI tables at %x, %u bytes, %u entries Cannot mmap SMBIOS tables at %xNot enough unique address ranges. SMBIOS DIMM sanity check failedMissing locator. SMBIOS DIMM sanity check failedAmbiguous locators `%s'<->`%s'. SMBIOS DIMM sanity check failed Unknown CPU type `%s' specified [at %.0f Mhz %u days %u:%u:%u uptime (unreliable)]%s config option `%s' unparseable Unknown user `%s' in %s:%s config entry Unknown group `%s' in %s:%s config entry Unknown CPU type vendor %u family %u model %uForced cputype %s does not match cpu type %s from mcelog TLB error '%s transaction, level %s' memory/cache error '%s mem transaction, %s transaction, level %s' bus error '%s, %s %s mem transaction %s access, level %s' Data cache ECC error (syndrome %x) TLB parity error in %s array Instruction cache ECC error MEMORY CONTROLLER %s_CHANNEL%s_ERR Did not receive credentials over client unix socket %p rejected client access from pid:%u uid:%u gid:%u Per page corrected memory statistics: %llx: total %u seen "%s" %s%s error while reading from client/sys/devices/system/memory/soft_offline_pageSoft offlining of page %llx failed, trying hard offlining /sys/devices/system/memory/hard_offline_pageOfflining page %llx failed: %s Running trigger `%s' (reporter: %s) Too many trigger children running already Cannot create process for triggerSOCKET:%d CHANNEL:%s DIMM:%s [%s%s%s]%scorrected %s memory error count exceeded thresholdCannot account memory errors because kernel does not report socketidFallback %s memory error count %d exceeded thresholdTrigger `%s' exited with status %d Trigger `%s' died with signal %s %s has large number of corrected cache errors in %s %sSystem operating correctly, but might lead to uncorrected cache errors soon Cannot read cache topology from %sCannot parse number in sysfs field %s/%s Cannot find sysfs cache for CPU %dsysfs field %s/%s has unknown string value `%s' Timeout waiting for exception on other CPUsmirroring with channel failovermirroring. Primary channel scrubbed successfully/sys/devices/system/cpu/cpu%d/cpuidle/proc/acpi/processor/CPU%d/power/sys/devices/system/cpu/cpu%d/cpufreq/cpuinfo_max_freq Threshold error count overflow no decoder for unknown bank %u Processor %d heated above trip temperature. Throttling enabled. Please check your system cooling. Performance will be impacted Processor %d below trip temperature. Throttling disabled Firmware may have updated this error Threshold based error status: %s corrected filtering (some unreported errors in same region) %s Generic cache hierarchy error Internal unclassified error: %x BUS error: %d %d %s %s %s %s %s %s received Bus and Interconnect Errors in %sIO MCA reported by root port %x:%02x:%02x.%x %s received IO MCA Errors from %x:%02x:%02x.%xbank: 0x%x bankgroup: 0x%x row: 0x%x column: 0x%x chipselect: 0x%x subrank: 0x%x CPUID Vendor %s Family %u Model %u Step %u WARNING: SMBIOS data is often unreliable. Take with a grain of salt! Memory device for address %llx too short %u Width %hu Data Width %hu Size %u %s No DIMM found for %llx in SMBIOS Hardware event. This is not a software error. WARNING: with --dmi mcelog --ascii must run on the same machine with the same BIOS/memory configuration as where the machine check occurred. CPU %u: Machine Check%*[ :Ec-x]%16Lx Bank %d: %016Lx%nCPUID Vendor %30s Family %u Model %u The hardware reports a non fatal, correctable incident occurredReplacements of page correctable error counter exceed threshold %sCorrected memory errors on page %llx exceed threshold %spre soft trigger run for page %lldpost soft trigger run for page %lldWarning: MCE buffer is overflowed. warning: %lu bytes ignored in each record Cannot set FD_CLOEXEC flag on fdaccept failed on client socketCannot enable credentials passing on client socketleft over characters at end of lineconfig file line not field nor headerCannot open input file `%s': %s Cannot access trigger directory `%s'Cannot access cache threshold trigger `%s'Cannot access bus threshold trigger `%s'Cannot access iomca threshold trigger `%s'Cannot access unknown threshold trigger `%s'Is your kernel built with CONFIG_X86_MCELOG_LEGACY=y?failed to prefill DIMM database from DMI dataClient socket path `%s' too long for unix socketmcelog server already running Cannot bind to client unix socket `%s'cannot listen for connections on client unix socketKernel does not support page offline interface memory-pre-sync-soft-ce-triggerCannot access page soft pre trigger `%s'memory-post-sync-soft-ce-triggerCannot access page soft post trigger `%s'Round up max-corr-err-counters from %d to %d Warning: cpu %d offline?, imc_log not set Cannot open %s to set imc_log Cannot read MSR_ERROR_CONTROL from %s Cannot write MSR_ERROR_CONTROL to %s Cannot re-read MSR_ERROR_CONTROL from %s No DIMM detection available on cpu %d (normal in virtual environments) Kernel in lockdown. Cannot enable DIMM error location reportingReceived hard error response on split transaction (Bus BINIT)BINIT received from external busFSB address parity error detectedtwo failing bus transactions with address parity error (AERR)bus transaction received hard error responsetimeout BINIT (ROB timeout). No micro-instruction retired for some timereceived parity error on response transactionMemory byte enable parity errorMemory error in half of redundant memoryMemory ECC error occurred during scrubQPI Interleave/Head Indication Bit (IIB)Clock jitter detected in internal QPI clockingQPI Sender sent a failed response to receiverSender sent too many QPI flits to the receiverQPI credit type is not supportedQPI received unsupported message encodingReceived QPI data packet that was poisoned by senderNumber of QPI retries exceededQPI Data packet had bad parityUncorrectable ECC event on outgoing core 2 dataUncorrectable ECC event on outgoing core 1 dataUncorrectable ECC event on outgoing core 0 dataCorrectable ECC event on outgoing core 2 dataCorrectable ECC event on outgoing core 1 dataCorrectable ECC event on outgoing core 0 dataIntel Cache Safe Technology Queue full error or disabled ways in a set overflowQuiet cycle timeout error (correctable)Write Exclusive error from core 0Write Exclusive error from core 1Write exclusive error from core 2Parity data error on inbound data detectedParity error on FSB response field detectedHard Failure response received for a local transactionParity error detected during FSB request phaseUncorrectable ECC event on outgoing FSB dataCorrectable ECC event on outgoing FSB dataEnhanced Intel SpeedStep Technology TM1-TM2 ErrorCBC OOD Queue Underflow/overflowPad logic detected a request strobe glitch or sequencing errorPad logic detected a data strobe glitch or sequencing errorData ECC event to error on inbound data correctable or uncorrectableDetected an Enhanced Defer parity error phase A or phase BData parity error on data received from Core 1 detectedData parity error on data received from Core 0 detectedFSB data parity error on inbound date detectedPartity error detected on Core 1 request's address fieldPartity error detected on Core 0 request's address fieldReset firmware did not completeInvalid Power Management RequestVID controller does not match POC controller selectedMSID from POC does not match CPU MSIDMC_PECI_MAILBOX_QUIESCE_TIMEOUTMC_WATCHDG_TIMEOUT_PKGC_SECONDARYMC_RECOVERABLE_DIE_THERMAL_TOO_HOTUncorrected patrol scrub errorHA Wrt byte enable parity errorHA Wrt buffer Data parity errorMC_PCIE_R2PCIE-RW_BLOCK_ACK_TIMEOUTMC_VR_ICC_MAX_LT_FUSED_ICC_MAXMC_PKGC_WATCHDOG_HANG_CBZ_DOWNMC_PKGC_WATCHDOG_HANG_C3_UP_SFMC_SVID_READ_REG_ICC_MAX_FAILEDMC_SVID_WRITE_REG_VOUT_MAX_FAILEDMC_HA_IMC_RW_BLOCK_ACK_TIMEOUTMC_WATCHDOG_TIMEOUT_PKGC_SECONDARYDDR4 command address parity erroriMC write data buffer parity errorUncorrected HA data byte enable errorUncorrected HA write data errorIntel QPI physical layer detected drift buffer alarmIntel QPI physical layer detected latency buffer rolloverIntel QPI link layer detected control error from R3QPIRx entered LLR abort state on CRC errorUnsupported or undefined packetIntel QPI link layer control errorIntel QPI physical layer detected a QPI in-band reset but aborted initializationLink failover data self healingPhy detected in-band reset (no width change)Rx detected CRC error - successful LLR after Phy re-initRx detected CRC error - successful LLR without Phy re-initMCA_PKGC_DIRECT_WAKE_RING_TIMEOUTUncorrected address parity errorHA write byte enable parity errorRead response to an invalid scoreboard entryDDR4 completion to an invalid scoreboard entryCompletion to an invalid scoreboard entryInterrupt received while outstanding interrupt was not ACKedLink Layer reset initiated while protocol traffic not idleLink Layer Reset still in progress when Phy enters L0Rx Header-or-Credit BGF credit overflow/underflowunexpected Tx Protocol flit (EOP, Header or Data)UC Phy detected drift buffer alarmUC Phy detected latency buffer rolloverUC LL Rx detected CRC error: unsuccessful LLR: entered abort stateUC LL Rx unsupported or undefined packetUC LL Rx parameter exchange exceptionUC LL detected control error from the link-mesh interfaceCOR Phy lane failure, recovery in x8 widthCOR Phy L0c error corrected without Phy resetCOR Phy L0c error triggering Phy ResetCOR Phy L0p exit error corrected with Phy resetCOR LL Rx detected CRC error - successful LLR without Phy ReinitCOR LL Rx detected CRC error - successful LLR with Phy ReinitMCA_BIOS_INVALID_PKG_STATE_CONFIGMCA_PKGC_WATCHDOG_HANG_CBZ_DOWNMCA_PKGC_WATCHDOG_HANG_C3_UP_SFMCA_SVID_VCCIN_VR_ICC_MAX_FAILUREMCA_SVID_VCCIN_VR_VOUT_FAILUREMCA_SVID_CPU_VR_CAPABILITY_ERRORMCA_SVID_MCP_VR_ABSENT_OR_RAMP_ERRORMCA_SVID_UNEXPECTED_MCP_VR_DETECTEDMCA_WATCHDOG_TIMEOUT_PKGC_SECONDARYMCA_WATCHDOG_TIMEOUT_PKGC_MAINMCA_WATCHDOG_TIMEOUT_PKGS_MAINMCA_PKGS_SMBUS_VPP_PAUSE_TIMEOUTMCA_RECOVERABLE_DIE_THERMAL_TOO_HOTDDR Data response to an invalid entryDDR data response to an entry not expecting dataDDR completion to an invalid entryDDR-T completion to an invalid entryDDR data/completion FIFO overflowDDR-T ERID correctable parity errorDDR-T ERID uncorrectable errorDDR-T interrupt received while outstanding interrupt was not ACKedDDR-T error on FNV write creditsDDR-T error on FNV read creditsDDR command / address parity errorHBM command / address parity errorM2M clock-domain-crossing buffer (BGF) errorPhy Initialization Failure (NumInit)Phy Detected Drift Buffer AlarmPhy Detected Latency Buffer RolloverLL Rx detected CRC error: unsuccessful LLR (entered Abort state)LL Rx Unsupported/Undefined packetPhy Lane failure, recovery in x8 widthPhy L0c error corrected without Phy resetPhy L0c error triggering Phy resetPhy L0p exit error corrected with resetLL Rx detected CRC error: successful LLR without Phy ReinitLL Rx detected CRC error: successful LLR with Phy ReinitUnexpected Tx Protocol flit (EOP, Header or Data)Instruction address out of valid spaceDouble bit RAM error on Instruction FetchData address out of valid spaceDouble bit RAM error on Data FetchClock/power IP response timeoutPM controller received invalid transactionMCA_DMI_STRAP_SET_ARRIVAL_TIMEOUTMCA_WATCHDOG_TIMEOUT_MSG_CH_FSMMCA_WATCHDOG_TIMEOUT_BULK_CR_FSMMCA_WATCHDOG_TIMEOUT_IOSFSB_FSMMCA_PKGS_SMBUS_MCP_PAUSE_TIMEOUTMCA_PKGS_SMBUS_SPD_PAUSE_TIMEOUTMCA_PKGC_WATCHDOG_HANG_C2_BLKMASTERMCA_PKGC_WATCHDOG_HANG_C2_PSLIMITMCA_PKGC_WATCHDOG_HANG_SETDISPMCA_BCLK_FREQ_OC_ABOVE_THRESHOLDMCA_DISPATCHER_RUN_BUSY_TIMEOUTDDR5 command / address parity errorCMI reserved credit pool errorCMI credit oversubscription errorUnrecoverable error during security flow executionVMX exit consistency check failuresRSM consistency check failuresInvalid conditions on protected mode SMM entryWDB Read Uncorr/Corr ECC Error on sCH1WDB BE Read Parity Error on sCH1WDB Read Persistent Corr ECC Error on sCH1CMI Wr data parity Error on sCH1CMI Uncorr/Corr ECC error on sCH1CMI Wr BE parity Error on sCH1CMI Wr MAC parity Error on sCH1MCTracker Address RF parity errorScheduler address parity errorWDB Read Uncorr/Corr ECC Error on sCH0WDB BE Read Parity Error on sCH0WDB Read Persistent Corr ECC Error on sCH0CMI Wr data parity Error on sCH0CMI Uncorr/Corr ECC error on sCH0CMI Wr BE parity Error on sCH0CMI Wr MAC parity Error on sCH0Transient or Correctable Error for Demand or Underfill ReadsUncorrectable Error for Demand or Underfill ReadsPoison was read from memory when poison was disabled in memory controllerCMI credit over subscription errorMCA_TSC_DOWNLOAD_TIMEOUT: TSC download timed outMCA_GPSB_TIMEOUT: GPSB does not respond within timeout valueMCA_PMSB_TIMEOUT: PMSB does not respond within timeout valueMCA_PMAX_CALIB_ERROR: PMAX calibration errorMCA_DISP_RUN_BUSY_TIMEOUT: Dispatcher busy beyond timeoutMCA_MORE_THAN_ONE_LT_AGENT: During Boot Mode Processing, >1 LT Agent detectedMCA_PCU_SVID_ERROR: SVID errorMCA_SVID_LOADLINE_INVALID: Invalid SVID VCCIN Loadline resistance valueMCA_SVID_ICCMAX_INVALID: Invalid SVID ICCMAX valueMCA_SVID_VIDMAX_INVALID: Invalid SVID VID_MAX valueMCA_SVID_VDDRAMP_INVALID: Invalid ramp voltage for VDD_RAMPMCA_ITD_FUSE_INVALID: ITD fuse settings are not validMCA_SVID_DC_LL_INVALID: ITD fuse settings are not validMCA_FIVR_PD_HARDERR: PM event has issued some FIVR FaultMCA_HPM_DOUBLE_BIT_ERROR_DETECTED: Read from HPM SRAM resulted in Double bit errorSVID_ACTIVE_VID_FUSE_ERROR: Invaid fuse values programmed for SVID Active vidPower Management Unit microcontroller double-bit ECC errorPower Management Unit microcontroller errorPower Management Unit microcontroller patch load errorPower Management Unit microcontroller POReqValid errorPower Management Unit microcontroller TeleSRAM double-bit ECC errorPower Management Agent signaled errorPower Management Unit HPMSRAM double-bit ECC error detectedPower Management Unit TPMISRAM double-bit ECC error detectedUC Phy Initialization Failure (NumInit)UC Phy Detected Drift Buffer AlarmUC Phy Detected Latency Buffer RolloverUC LL Rx detected CRC error: unsuccessful LLR (entered Abort state)UC LL Rx Unsupported/Undefined packetCOR Phy Lane failure, recovery in x8 widthCOR Phy L0c error triggering Phy resetCOR Phy L0p exit error corrected with resetCOR LL Rx detected CRC error: successful LLR without Phy ReinitCOR LL Rx detected CRC error: successful LLR with Phy ReinitCorrected Demand/Patrol Scrub ErrorIntel generic architectural MCAIntel Xeon (Broadwell) D familyIntel Xeon v4 (Broadwell) EP/EXIntel Xeon v2 (Ivy Bridge) EP/EXIntel Xeon 5500 series / Core i3/5/7 ("Nehalem/Westmere")error overflow (multiple errors)Kernel does not support page offline interfaceyellow Large number of corrected cache errors. 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