MAJOR=29
MINOR=0
DEVNAME=fb0
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/*
 * USB 338x super/high/full speed USB device controller.
 * Unlike many such controllers, this one talks PCI.
 *
 * Copyright (C) 2002 NetChip Technology, Inc. (http://www.netchip.com)
 * Copyright (C) 2003 David Brownell
 * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
 */

#ifndef __LINUX_USB_USB338X_H
#define __LINUX_USB_USB338X_H

#include <linux/usb/net2280.h>

/*
 * Extra defined bits for net2280 registers
 */
#define     SCRATCH			      0x0b

#define     DEFECT7374_FSM_FIELD                28
#define     SUPER_SPEED				 8
#define     DMA_REQUEST_OUTSTANDING              5
#define     DMA_PAUSE_DONE_INTERRUPT            26
#define     SET_ISOCHRONOUS_DELAY               24
#define     SET_SEL                             22
#define     SUPER_SPEED_MODE                     8

/*ep_cfg*/
#define     MAX_BURST_SIZE                      24
#define     EP_FIFO_BYTE_COUNT                  16
#define     IN_ENDPOINT_ENABLE                  14
#define     IN_ENDPOINT_TYPE                    12
#define     OUT_ENDPOINT_ENABLE                 10
#define     OUT_ENDPOINT_TYPE                    8
#define USB3380_EP_CFG_MASK_IN ((0x3 << IN_ENDPOINT_TYPE) | \
				BIT(IN_ENDPOINT_ENABLE))
#define USB3380_EP_CFG_MASK_OUT ((0x3 << OUT_ENDPOINT_TYPE) | \
				BIT(OUT_ENDPOINT_ENABLE))

struct usb338x_usb_ext_regs {
	u32     usbclass;
#define     DEVICE_PROTOCOL                     16
#define     DEVICE_SUB_CLASS                     8
#define     DEVICE_CLASS                         0
	u32     ss_sel;
#define     U2_SYSTEM_EXIT_LATENCY               8
#define     U1_SYSTEM_EXIT_LATENCY               0
	u32     ss_del;
#define     U2_DEVICE_EXIT_LATENCY               8
#define     U1_DEVICE_EXIT_LATENCY               0
	u32     usb2lpm;
#define     USB_L1_LPM_HIRD                      2
#define     USB_L1_LPM_REMOTE_WAKE               1
#define     USB_L1_LPM_SUPPORT                   0
	u32     usb3belt;
#define     BELT_MULTIPLIER                     10
#define     BEST_EFFORT_LATENCY_TOLERANCE        0
	u32     usbctl2;
#define     LTM_ENABLE                           7
#define     U2_ENABLE                            6
#define     U1_ENABLE                            5
#define     FUNCTION_SUSPEND                     4
#define     USB3_CORE_ENABLE                     3
#define     USB2_CORE_ENABLE                     2
#define     SERIAL_NUMBER_STRING_ENABLE          0
	u32     in_timeout;
#define     GPEP3_TIMEOUT                       19
#define     GPEP2_TIMEOUT                       18
#define     GPEP1_TIMEOUT                       17
#define     GPEP0_TIMEOUT                       16
#define     GPEP3_TIMEOUT_VALUE                 13
#define     GPEP3_TIMEOUT_ENABLE                12
#define     GPEP2_TIMEOUT_VALUE                  9
#define     GPEP2_TIMEOUT_ENABLE                 8
#define     GPEP1_TIMEOUT_VALUE                  5
#define     GPEP1_TIMEOUT_ENABLE                 4
#define     GPEP0_TIMEOUT_VALUE                  1
#define     GPEP0_TIMEOUT_ENABLE                 0
	u32     isodelay;
#define     ISOCHRONOUS_DELAY                    0
} __packed;

struct usb338x_fifo_regs {
	/* offset 0x0500, 0x0520, 0x0540, 0x0560, 0x0580 */
	u32     ep_fifo_size_base;
#define     IN_FIFO_BASE_ADDRESS                                22
#define     IN_FIFO_SIZE                                        16
#define     OUT_FIFO_BASE_ADDRESS                               6
#define     OUT_FIFO_SIZE                                       0
	u32     ep_fifo_out_wrptr;
	u32     ep_fifo_out_rdptr;
	u32     ep_fifo_in_wrptr;
	u32     ep_fifo_in_rdptr;
	u32     unused[3];
} __packed;


/* Link layer */
struct usb338x_ll_regs {
	/* offset 0x700 */
	u32   ll_ltssm_ctrl1;
	u32   ll_ltssm_ctrl2;
	u32   ll_ltssm_ctrl3;
	u32   unused1;

	/* 0x710 */
	u32   unused2;
	u32   ll_general_ctrl0;
	u32   ll_general_ctrl1;
#define     PM_U3_AUTO_EXIT                                     29
#define     PM_U2_AUTO_EXIT     