369-370 # ˆl–Ãa¾”ªClÊq@?q±\êbѿà ƒy—[ÂÆÅ · /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2006, Intel Corporation. * * Copyright (C) Ashok Raj * Copyright (C) Shaohua Li */ #ifndef __DMAR_H__ #define __DMAR_H__ #include #include #include #include #include #include struct acpi_dmar_header; #define DMAR_UNITS_SUPPORTED 1024 /* DMAR Flags */ #define DMAR_INTR_REMAP 0x1 #define DMAR_X2APIC_OPT_OUT 0x2 #define DMAR_PLATFORM_OPT_IN 0x4 struct intel_iommu; struct dmar_dev_scope { struct device __rcu *dev; u8 bus; u8 devfn; }; #ifdef CONFIG_DMAR_TABLE extern struct acpi_table_header *dmar_tbl; struct dmar_drhd_unit { struct list_head list; /* list of drhd units */ struct acpi_dmar_header *hdr; /* ACPI header */ u64 reg_base_addr; /* register base address*/ unsigned long reg_size; /* size of register set */ struct dmar_dev_scope *devices;/* target device array */ int devices_cnt; /* target device count */ u16 segment; /* PCI domain */ u8 ignored:1; /* ignore drhd */ u8 include_all:1; u8 gfx_dedicated:1; /* graphic dedicated */ struct intel_iommu *iommu; }; struct dmar_pci_path { u8 bus; u8 device; u8 function; }; struct dmar_pci_notify_info { struct pci_dev *dev; unsigned long event; int bus; u16 seg; u16 level; struct dmar_pci_path path[]; } __attribute__((packed)); extern struct rw_semaphore dmar_global_lock; extern struct list_head dmar_drhd_units; #define for_each_drhd_unit(drhd) \ list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ dmar_rcu_check()) #define for_each_active_drhd_unit(drhd) \ list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ dmar_rcu_check()) \ if (drhd->ignored) {} else #define for_each_active_iommu(i, drhd) \ list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ dmar_rcu_check()) \ if (i=drhd->iommu, drhd->ignored) {} else #define for_each_iommu(i, drhd) \ list_for_each_entry_rcu(drhd, &dmar_drhd_units, list, \ dmar_rcu_check()) \ if (i=drhd->iommu, 0) {} else static inline bool dmar_rcu_check(void) { return rwsem_is_locked(&dmar_global_lock) || system_state == SYSTEM_BOOTING; } #define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check()) #define for_each_dev_scope(devs, cnt, i, tmp) \ for ((i) = 0; ((tmp) = (i) < (cnt) ? \ dmar_rcu_dereference((devs)[(i)].dev) : NULL, (i) < (cnt)); \ (i)++) #define for_each_active_dev_scope(devs, cnt, i, tmp) \ for_each_dev_scope((devs), (cnt), (i), (tmp)) \ if (!(tmp)) { continue; } else extern int dmar_table_init(void); extern int dmar_dev_scope_init(void); extern void dmar_register_bus_notifier(void); extern int dmar_parse_dev_scope(void *start, void *end, int *cnt, struct dmar_dev_scope **devices, u16 segment); extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt); extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt); extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info, void *start, void*end, u16 segment, struct dmar_dev_scope *devices, int devices_cnt); extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info, u16 segment, struct dmar_dev_scope *devices, int count); /* Intel IOMMU detection */ void detect_intel_iommu(void); extern int enable_drhd_fault_handling(unsigned int cpu); extern int dmar_device_add(acpi_handle handle); extern int dmar_device_remove(acpi_handle handle); static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg) { return 0; } #ifdef CONFIG_DMAR_DEBUG void dmar_fault_dump_ptes(struct intel_iommu *iommu, u16 source_id, unsigned long long addr, u32 pasid); #else static inline void dmar_fault_dump_ptes(struct intel_iommu *iommu, u16 source_id, unsigned long long addr, u32 pasid) {} #endif #ifdef CONFIG_INTEL_IOMMU extern int iommu_detected, no_iommu; extern int intel_iommu_