MODALIAS=acpi:PNP0F13:
  +   	ˆl–äY>”TÔD¨ 	Å�rã`S�ÿ¿„Œ¾÷_†I|¥�+ÄÃ ?÷     	/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2016 Chen Zhong <chen.zhong@mediatek.com>
 */

#ifndef __MFD_MT6323_REGISTERS_H__
#define __MFD_MT6323_REGISTERS_H__

/* PMIC Registers */
#define MT6323_CHR_CON0           0x0000
#define MT6323_CHR_CON1           0x0002
#define MT6323_CHR_CON2           0x0004
#define MT6323_CHR_CON3           0x0006
#define MT6323_CHR_CON4           0x0008
#define MT6323_CHR_CON5           0x000A
#define MT6323_CHR_CON6           0x000C
#define MT6323_CHR_CON7           0x000E
#define MT6323_CHR_CON8           0x0010
#define MT6323_CHR_CON9           0x0012
#define MT6323_CHR_CON10          0x0014
#define MT6323_CHR_CON11          0x0016
#define MT6323_CHR_CON12          0x0018
#define MT6323_CHR_CON13          0x001A
#define MT6323_CHR_CON14          0x001C
#define MT6323_CHR_CON15          0x001E
#define MT6323_CHR_CON16          0x0020
#define MT6323_CHR_CON17          0x0022
#define MT6323_CHR_CON18          0x0024
#define MT6323_CHR_CON19          0x0026
#define MT6323_CHR_CON20          0x0028
#define MT6323_CHR_CON21          0x002A
#define MT6323_CHR_CON22          0x002C
#define MT6323_CHR_CON23          0x002E
#define MT6323_CHR_CON24          0x0030
#define MT6323_CHR_CON25          0x0032
#define MT6323_CHR_CON26          0x0034
#define MT6323_CHR_CON27          0x0036
#define MT6323_CHR_CON28          0x0038
#define MT6323_CHR_CON29          0x003A
#define MT6323_STRUP_CON0         0x003C
#define MT6323_STRUP_CON2         0x003E
#define MT6323_STRUP_CON3         0x0040
#define MT6323_STRUP_CON4         0x0042
#define MT6323_STRUP_CON5         0x0044
#define MT6323_STRUP_CON6         0x0046
#define MT6323_STRUP_CON7         0x0048
#define MT6323_STRUP_CON8         0x004A
#define MT6323_STRUP_CON9         0x004C
#define MT6323_STRUP_CON10        0x004E
#define MT6323_STRUP_CON11        0x0050
#define MT6323_SPK_CON0           0x0052
#define MT6323_SPK_CON1           0x0054
#define MT6323_SPK_CON2           0x0056
#define MT6323_SPK_CON6           0x005E
#define MT6323_SPK_CON7           0x0060
#define MT6323_SPK_CON8           0x0062
#define MT6323_SPK_CON9           0x0064
#define MT6323_SPK_CON10          0x0066
#define MT6323_SPK_CON11          0x0068
#define MT6323_SPK_CON12          0x006A
#define MT6323_CID                0x0100
#define MT6323_TOP_CKPDN0         0x0102
#define MT6323_TOP_CKPDN0_SET     0x0104
#define MT6323_TOP_CKPDN0_CLR     0x0106
#define MT6323_TOP_CKPDN1         0x0108
#define MT6323_TOP_CKPDN1_SET     0x010A
#define MT6323_TOP_CKPDN1_CLR     0x010C
#define MT6323_TOP_CKPDN2         0x010E
#define MT6323_TOP_CKPDN2_SET     0x0110
#define MT6323_TOP_CKPDN2_CLR     0x0112
#define MT6323_TOP_RST_CON        0x0114
#define MT6323_TOP_RST_CON_SET    0x0116
#define MT6323_TOP_RST_CON_CLR    0x0118
#define MT6323_TOP_RST_MISC       0x011A
#define MT6323_TOP_RST_MISC_SET   0x011C
#define MT6323_TOP_RST_MISC_CLR   0x011E
#define MT6323_TOP_CKCON0         0x0120
#define MT6323_TOP_CKCON0_SET     0x0122
#define MT6323_TOP_CKCON0_CLR     0x0124
#define MT6323_TOP_CKCON1         0x0126
#define MT6323_TOP_CKCON1_SET     0x0128
#define MT6323_TOP_CKCON1_CLR     0x012A
#define MT6323_TOP_CKTST0         0x012C
#define MT6323_TOP_CKTST1         0x012E
#define MT6323_TOP_CKTST2         0x0130
#define MT6323_TEST_OUT           0x0132
#define MT6323_TEST_CON0          0x0134
#define MT6323_TEST_CON1          0x0136
#define MT6323_EN_STATUS0         0x0138
#define MT6323_EN_STATUS1         0x013A
#define MT6323_OCSTATUS0          0x013C
#define MT6323_OCSTATUS1          0x013E
#define MT6323_PGSTATUS           0x0140
#define MT6323_CHRSTATUS          0x0142
#define MT6323_TDSEL_CON          0x0144
#define MT6323_RDSEL_CON          0x0146
#define MT6323_SMT_CON0           0x0148
#define MT6323_SMT_CON1           0x014A
#define MT6323_SMT_CON2           0x014C
#define MT6323_SMT_CON3           0x014E
#define MT6323_SMT_CON4           0x0150
#define MT6323_DRV_CON0           0x0